Modern Pattern for The Characterization of Standard Cell Library

Abstract

This paper presents the creation of one more view to achieve accurate characterization of standard cell library. Accurate location of cells is beneficial for the fabrication process to carried out. The main motive of engineer’s team is to place standard cells at some definite location to have the desired output as specified by the customer. For this purpose, the location of zero cells will dumped in this model. Void view is that in which location of these type of cells will be displayed exactly.

Introduction

Characterization is a process of analysing a circuit using static and dynamic methods to generate models suitable for chip implementation flows. In order to achieve the fabrication process smoothly and correctly, the generation of various timing and power model is required. These models can be generated with the help of various tools like Eldo, spectre etc for circuit simulation. On the other hand, characterization tool like Liberty NCX, Magma silicon smart. With the help of these tools we can Create electrical views (timing, power and thesignal integrity) in industry standard formats such as Synopsys Liberty (.lib) format. The main objective of cell characterization is to achieve cell behavior accurately and efficiently. This characterization process will help us in many stages of ASIC flow design like Placement and Routing. By knowing the exact location of zero cells, this will boost up the process of Cell modeling.

Different team will obviously have different contribution towards the implementation of chip design. We used to place standard cells like inverter, flip flop, multiplexer on chip die to achieve the desired output as specified by the customer and memory team will place their memory cells on that chip die. In an ASIC design the output of one standard cell will be the input to other memory cell or vice versa. While placing this type of cells on die some space will be left between the standard cells and memory cells this remaining space can be called as Void and the model which will help us to know the location of these can be called as Void View. The marked area in this figure shows the area which can be referred as void. The location of this empty spaces can be specified by this model in the form of zero cells (x, y) where X and Y denotes the coordinates of that cells.

Conclusion

In conclusions, this way we can have the exact view of empty spaces that are left while fabricating the chip. This void space can be filled by filler cells also.