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Multi-threading has emerged as promising and effective avenue in tolerating memory latency. The process of implementation is majorly distinguished into two types that is used to share memory units among the processors. First approach is the hardware approach which uses the shared memory machines; other method is the software approach that provides a virtual shared memory impression through a middleware. The Shared memory is measured as a simple yet efficient parallel programming model; Shared memory is a widely accepted model to build parallel applications. The main advantage is to provide the programmer with a proper communication paradigm: however, with the research made through years’, it is shown that it is challenging to deliver shared memory illusion to large-scale systems. Though the hardware approach through cache coherence has proved its efficiency, regarding cost, it is not scalable. On the other hand, shared virtual memory is a cost-effective method to provide the shared memory abstraction on a computer network with minor processing overhead.
To the greatest extent, Distributed Shared Memory (DSM) systems and the memory coherence protocols are employed to support multi-process computing. These processes do not have a common virtual address spaces, and they are given to different computers. Several new problems appear while extending this model to multi-threaded cases. Firstly, default state of multi-threaded programs is virtually shared address space. With machines which are separated physically, the address space and code segments will be duplicated. However, these global variables need to be shared both locally and remotely in data segments. As the Virtual Memory Management (VMM) deal with pages in operating systems as an alternative of data items, access patterns and variable locations may acquire high communication frequency and volume. Secondly, multi-threaded programs use mutex locks for accessing critical sections. In distributed systems, locks are not shared by these threads any longer. As a result, the Traditional lock mechanism will not work.
Lastly, most of the current consistency protocols in the existing shared virtual memory systems such as Overlapped Homebased LRC, Tread Marks System and Home-based LRC need a clear relationship between locks and the data in advance. However, it can be hard to obtain such information by compilers particularly if the accessing datum is pointed towards a pointer. Generally, programmers need to take care of these processes manually. The following contributions are made in this paper: they are, Locality-based data distribution – Memory block for global variables are restructured while the data segments are replicated and later dispatched to other different locations based on pattern that is accessed between threads and data. The host of specific thread bundle reduce communication frequency and volume of the data segments.
The DSM system allows processes in adopting a globally virtual shared memory. DSM software brings abstraction for globally shared-memory, that permits a processor in accessing any data item, and also programmers need not to worry about how and where to get the data. For the programs with the sophisticated parallelization strategies and composite data structures, it is a huge task. The programmer can make emphasis on algorithmic development more than communication handling and data management with the DSM systems.
In addition to the programming ease, the DSM also provides the programming environment as in hardware Distributed Shared Memory systems, termed multiprocessors. These processors which are developed in DSM can adopt programs quickly. The program that is ported from hardware shared-memory multiprocessor to a DSM system need program changes. A software DSM system with a higher latency makes the locality problem of memory access more critical. However, in both the environments, programmers can use the same algorithm design.
The DSM systems offers the virtual shared memory midst physically non-shared memory units. Mostly such DSM systems opt to replicate data because it gives the best performance for a broad range of application parameters. The facility of memory consistency with the copied data is the core of a DSM system as the DSM software should control the replication such that it provides a single image of shared memory. Traditional DSMs have addressed them adequately for the multi-process systems.
The “Multiple-Writer” problem needs to be handled as for the same page, and at the same time, various threads may need to change different data items. Most of the DSM systems and hardware cache coherence use single-writer protocols. These protocols allows several readers to access a given page concurrently. However, only one writer will have the exclusive access to a page that plays as a crucial section for the modifications. The “Multiple-Writer” could be resolved by the home-based DSM if the relationship between the date and computations are well defined.
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